Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSP
US8796846B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2009 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Mar 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is made by forming a first conductive layer over a carrier. The first conductive layer has a first area electrically isolated from a second area of the first conductive layer. A conductive pillar is formed over the first area of the first conductive layer. A semiconductor die or component is mounted to the second area of the first conductive layer. A first encapsulant is deposited over the semiconductor die and around the conductive pillar. A first interconnect structure is formed over the first encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The carrier is removed. A portion of the first conductive layer is removed. The remaining portion of the first conductive layer includes an interconnect line and UBM pad. A second interconnect structure is formed over a remaining portion of the first conductive layer is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.