Extending cache coherency protocols to support locally buffered data
US8799582B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2008 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Sep 23, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for extending cache coherency to hold buffered data to support transactional execution is herein described. A transactional store operation referencing an address associated with a data item is performed in a buffered manner. Here, the coherency state associated with cache lines to hold the data item are transitioned to a buffered state. In response to local requests for the buffered data item, the data item is provided to ensure internal transactional sequential ordering. However, in response to external access requests, a miss response is provided to ensure the transactionally updated data item is not made globally visible until commit. Upon commit, the buffered lines are transitioned to a modified state to make the data item globally visible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.