Semiconductor device package
US8802508B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2012 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Nov 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73265
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Forming a packaged semiconductor device includes placing a semiconductor die attached to a carrier into a mold cavity having an injection port, wherein the semiconductor die has an encapsulant exclusion region on a top surface of the semiconductor die within an outer perimeter of the top surface; and flowing an encapsulant over the semiconductor die and carrier from the injection port, wherein the encapsulant flows around the encapsulant exclusion region to surround the encapsulant exclusion region without covering the encapsulant exclusion region. The encapsulant exclusion region has a first length corresponding to a single longest distance across the encapsulant exclusion region, wherein the first length is aligned, within 30 degrees, to a line defined by a shortest distance between an entry point of the injection port into the mold cavity and an outer perimeter of the encapsulant exclusion region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.