Methods of making jogged layout routings double patterning compliant
US8802574B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2012 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Jun 12, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/70
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One illustrative method disclosed herein involves creating an overall target pattern that includes an odd-jogged feature with a crossover region that connects first and second line portions, wherein the crossover region has a first dimension in a first direction that is greater than a second dimension that is transverse to the first direction, decomposing the overall target pattern into a first sub-target pattern and a second sub-target pattern, wherein each of the sub-target patterns comprise a line portion and a first portion of the crossover region, and generating first and second sets of mask data corresponding to the first and second sub-target patterns, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.