Patent · US Active

Controller to execute error correcting code algorithms and manage NAND memories

US8806293B2 · kind B2 · utility

14Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 9, 2008
Grant dateAug 12, 2014
Priority date
Expiry dateAug 31, 2029

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.