Integrated circuit packaging system with plated leads and method of manufacture thereof
US8809119B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2013 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | May 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit packaging system and method of manufacture thereof including: providing a leadframe having unprocessed leads; depositing an etch mask on a top surface of the unprocessed leads, the unprocessed leads having the etch mask and an unmasked portions of the top surface; connecting an integrated circuit die to the unprocessed leads; encapsulating with a package body the leadframe, the top surface of the unprocessed leads exposed from the package body; forming side-solderable leads including forming a groove in the unprocessed leads, the groove formed under a portion of the etch mask including forming an overhang of the etch mask over the groove; removing the etch mask; and depositing a plating on the side-solderable leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.