Inventor · Singapore, SG

Emmanuel Espiritu

54Patents
8h-index
21Co-inventors
74Inventor score

Filing activity: Mar 10, 2006 → May 23, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US8409922B2 Semiconductor device and method of forming leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect Electricity 54 Active
US8993376B2 Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die Electricity 49 Active
US9006031B2 Semiconductor device and method of forming EWLB package with standoff conductive layer over encapsulant bumps Electricity 41 Active
US8076184B1 Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die Electricity 24 Active
US8241956B2 Semiconductor device and method of forming wafer level multi-row etched lead package Electricity 16 Active
US8026129B2 Stacked integrated circuits package system with passive components Electricity 13 Active
US7687892B2 Quad flat package Electricity 10 Active
US9281300B2 Chip scale module package in BGA semiconductor package Electricity 8 Active
US8334584B2 Integrated circuit packaging system with quad flat no-lead package and method of manufacture thereof Electricity 8 Active
US8193037B1 Integrated circuit packaging system with pad connection and method of manufacture thereof Electricity 8 Active
US8395254B2 Integrated circuit package system with heatspreader Electricity 6 Active
US8866275B2 Leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect Electricity 5 Active
US8809119B1 Integrated circuit packaging system with plated leads and method of manufacture thereof Electricity 4 Active
US9305809B1 Integrated circuit packaging system with coreless substrate and method of manufacture thereof Emerging Cross-Sectional Technologies 4 Active
US9355983B1 Integrated circuit packaging system with interposer structure and method of manufacture thereof Electricity 4 Active
US8803300B2 Integrated circuit packaging system with protective coating and method of manufacture thereof Electricity 4 Active
US8203201B2 Integrated circuit packaging system with leads and method of manufacture thereof Electricity 3 Active
US8241965B2 Integrated circuit packaging system with pad connection and method of manufacture thereof Electricity 3 Active
US8617933B2 Integrated circuit packaging system with interlock and method of manufacture thereof Electricity 2 Active
US8643166B2 Integrated circuit packaging system with leads and method of manufacturing thereof Electricity 2 Active
US7659608B2 Stacked die semiconductor device having circuit tape Electricity 2 Active
US8669649B2 Integrated circuit packaging system with interlock and method of manufacture thereof Electricity 2 Active
US8502358B2 Integrated circuit packaging system with multi-row leads and method of manufacture thereof Electricity 2 Active
US8802501B2 Integrated circuit packaging system with island terminals and method of manufacture thereof Electricity 2 Active
US8455993B2 Integrated circuit packaging system with multiple row leads and method of manufacture thereof Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.