Fin held effect transistor
US8809940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2013 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Apr 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A FinFET is described, the FinFET includes a substrate including a top surface and a first insulation region and a second insulation region over the substrate top surface comprising tapered top surfaces. The FinFET further includes a fin of the substrate extending above the substrate top surface between the first and second insulation regions, wherein the fin includes a recessed portion having a top surface lower than the tapered top surfaces of the first and second insulation regions, wherein the fin includes a non-recessed portion having a top surface higher than the tapered top surfaces. The FinFET further includes a gate stack over the non-recessed portion of the fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.