Hung-Ta Lin
38Patents
9h-index
35Co-inventors
71Inventor score
Filing activity: Dec 27, 2002 → Jun 27, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8440517B2 | FinFET and method of fabricating the same | Electricity | 249 | Active |
| US8497177B1 | Method of making a FinFET device | Electricity | 217 | Active |
| US7323162B2 | Aqueous cosmetic coloring and gloss compositions having film formers | Human Necessities | 20 | Expired |
| US8058082B2 | Light-emitting diode with textured substrate | Electricity | 19 | Active |
| US8629465B2 | Light-emitting diodes on concave texture substrate | Electricity | 17 | Active |
| US9099388B2 | III-V multi-channel FinFETs | Electricity | 15 | Active |
| US9209300B2 | Fin field effect transistor | Electricity | 10 | Active |
| US8134163B2 | Light-emitting diodes on concave texture substrate | Electricity | 9 | Active |
| US8822290B2 | FinFETs and methods for forming the same | Electricity | 9 | Active |
| US8809940B2 | Fin held effect transistor | Electricity | 5 | Active |
| US9029246B2 | Methods of forming epitaxial structures | Electricity | 4 | Active |
| US8236583B2 | Method of separating light-emitting diode from a growth substrate | Electricity | 3 | Active |
| US9379215B2 | Fin field effect transistor | Electricity | 3 | Active |
| US9478631B2 | Vertical-gate-all-around devices and method of fabrication thereof | Electricity | 3 | Active |
| US8629037B2 | Forming a protective film on a back side of a silicon wafer in a III-V family fabrication process | Electricity | 3 | Active |
| US8629013B2 | Junction leakage reduction through implantation | Electricity | 3 | Active |
| US9853102B2 | Tunnel field-effect transistor | Electricity | 3 | Active |
| US9716091B2 | Fin field effect transistor | Electricity | 3 | Active |
| US8659033B2 | Light-emitting diode with textured substrate | Electricity | 2 | Active |
| US8772831B2 | III-nitride growth method on silicon substrate | Electricity | 2 | Active |
| US8791504B2 | Substrate breakdown voltage improvement for group III-nitride on a silicon substrate | Electricity | 2 | Active |
| US8779445B2 | Stress-alleviation layer for LED structures | Electricity | 2 | Active |
| US9184289B2 | Semiconductor device and formation thereof | Electricity | 2 | Active |
| US9741800B2 | III-V multi-channel FinFETs | Electricity | 1 | Active |
| US9397169B2 | Epitaxial structures | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.