Wafer identification fault recovery
US8811715B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Dec 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described are computer-based methods and apparatuses, including computer program products, for wafer identification fault recovery. A digital image is received that includes a data symbol comprising a message encoded in a set of data cells. The digital image is processed to form a set of classified data cells, wherein one or more classified data cells from the set of classified data cells comprises an error. User interface data is transmitted comprising the digital image and interactive graphics, the interactive graphics including at least one data cell control. Interaction data is received from the interactive graphics that modifies a data cell location, a data cell state, or both, of at least one classified data cell from the set of classified data cells to form a modified set of classified data cells. An error free decoded message string is generated based on the modified set of classified data cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.