Independently voltage controlled volume of silicon on a silicon on insulator chip
US8816470B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2011 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Apr 21, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/378
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip has an independently voltage controlled silicon region that is a circuit element useful for controlling capacitor values of eDRAM trench capacitors and threshold voltages of field effect transistors overlying the independently voltage controlled silicon region. A bottom, or floor, of the independently voltage controlled silicon region is a deep implant of opposite doping to a doping of a substrate of the independently voltage controlled silicon region. A top, or ceiling, of the independently voltage controlled silicon region is a buried oxide implant in the substrate. Sides of the independently voltage controlled silicon region are deep trench isolation. Voltage of the independently voltage controlled silicon region is applied through a contact structure formed through the buried oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.