Semiconductor device with charge compensation structure arrangement for optimized on-state resistance and switching losses

US8823084B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Stefan Gamerith · Villach, AT
• Hans Weber · Villach, AT
• Franz Hirler · Isen, DE

Key dates

• Filing date: Dec 31, 2012
• Grant date: Sep 2, 2014
• Expiry date: Dec 31, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

A semiconductor device has a source metallization, drain metallization, and semiconductor body. The semiconductor body includes a drift layer of a first conductivity contacted with the drain metallization, a buffer (and field-stop) layer of the first conductivity higher in maximum doping concentration than the drift layer, and a plurality of compensation regions of a second conductivity, each forming a pn-junction with the drift and buffer layers and in contact with the source metallization. Each compensation region includes a first portion between a second portion and the source metallization. The first portions and the drift layer form a first area having a vanishing net doping. The second portions and the buffer layer form a second area of the first conductivity. A space charge region forms in the second area when a reverse voltage of more than 30% of the device breakdown voltage is applied between the drain and source metallizations.