Semiconductor chip, semiconductor package, and method for manufacturing semiconductor chip for reducing open failures
US8823161B2 · kind B2 · utility
1Cited by
4References
8Claims
0Family size
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Key dates
| Filing date | Sep 23, 2011 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Oct 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06544
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip includes a substrate having a first surface and a second surface opposite to the first surface, a chip pad disposed on the first surface of the substrate, and a through-silicon via (TSV) including a plurality of sub vias electrically connected to the chip pad at different positions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.