Systems and methods for controlling power in semiconductor circuits
US8823445B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2012 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Nov 29, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power control circuit includes a plurality of transistors coupled between a power supply node and a gated power supply node, wherein the gate electrode of a first transistor of the plurality of transistors is coupled to receive a power control signal, wherein, in response to assertion of the power control signal, the first transistor is placed into a conductive state; a first voltage comparator, wherein, in response to assertion of the power control signal, places a second transistor of the plurality of transistors in a conductive state when a voltage on the gated voltage supply node reaches a first reference voltage; and a second voltage comparator, wherein, in response to assertion of the power control signal, places a third transistor of the plurality of transistors in a conductive state when the voltage on the gated voltage supply node reaches a second reference voltage different from the first reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.