Method for fabricating a DRAM capacitor
US8828836B2 · kind B2 · utility
4Cited by
4References
8Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jun 6, 2011 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Jun 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/694
Abstract
A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal. A dielectric layer is formed over the first electrode. The dielectric layer is subjected to a milliseconds anneal process that serves to crystallize the dielectric material and decrease the concentration of oxygen vacancies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.