Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers
US8829683B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2013 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Mar 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A through via contains a conductor (244, 262) passing through a substrate (140). The substrate can be SOI or some other substrate containing two semiconductor layers (140.1, 140.2) on opposite sides of an insulating layer (140B). The through via includes two constituent vias (144.1, 144.2) formed from respective different sides of the substrate by processes stopping on the insulating layer (140B). Due to the insulating layer acting as a stop layer, high control over the constituent vias' depths is achieved. Each constituent via is shorter than the through via, so via formation is facilitated. The conductor is formed by separate depositions of conductive material into the constituent vias from each side of the substrate. From each side, the conductor is deposited to a shallower depth than the through-via depth, so the deposition is facilitated. Other embodiments are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.