Multi-level memory cell with continuously tunable switching
US8830727B2 · kind B2 · utility
4Cited by
1References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2011 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Sep 26, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/15
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a data storage device that includes multi-level memory cells. The data storage device may include circuitry configured to write data to the multi-level memory cell. The write circuitry may include compliance circuitry configured to implement continuously tunable switching. The write circuitry may be configured to select a compliance mode for the switching, the compliance mode being selected from the group comprising current compliance and voltage compliance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.