Fully molded fan-out
US8835230B2 · kind B2 · utility
3Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 9, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | May 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a device package may include constructing a spacer element coupled with a surface of a semiconductor die unit, where the spacer element is configured to create a gap between the semiconductor die unit and a surface of a carrier, and encapsulating the semiconductor die unit within a mold compound, where the encapsulating includes introducing the mold compound into the gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.