Integrated circuitry, methods of forming memory cells, and methods of patterning platinum-containing material
US8835891B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Dec 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.