Integrated circuits with non-volatile memory and methods for manufacture

US8836006B2 · kind B2 · utility

Assignee

• Spansion LLC. · US

Inventors

• Kuo-Tung Chang · Saratoga, US
• Chun Chen · San Jose, US
• Shenqing Fang · Fremont, US

Key dates

• Filing date: Dec 14, 2012
• Grant date: Sep 16, 2014
• Expiry date: Dec 14, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/037

Abstract

Semiconductor devices and the manufacture of such semiconductor devices are described. According to various aspects of the disclosure, a semiconductor device can include a memory region, a first logic region, and a second logic region. A select gate can be formed in the memory region of the device and a first logic gate formed in the logic region. A charge trapping dielectric can then be disposed and removed from a second logic region. A gate conductor layer can then be disposed on the device and etched to define a memory gate on the sidewall of the select gate and a second logic gate in the second logic region.