Method for fabricating semiconductor device and PMOS device fabricated by the method
US8841181B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2012 |
| Grant date | Sep 23, 2014 |
| Priority date | — |
| Expiry date | Jul 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0212
Abstract
A method for fabricating a semiconductor device is described. A gate layer, a C-doped first protective layer and a hard mask layer are formed on a substrate and then patterned to form a first stack in a first area and a second stack in a second area. A second protective layer is formed on the sidewalls of the first and the second stacks. A blocking layer is formed in the first area and a first spacer formed on the sidewall of the second protective layers on the sidewall of the second stack in the second area. A semiconductor compound is formed in the substrate beside the first spacer. The blocking layer and the first spacer are removed. The hard mask layer in the first stack and the second stack is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.