Resistive memory cell
US8847196B2 · kind B2 · utility
1Cited by
4References
16Claims
0Family size
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Key dates
| Filing date | May 17, 2011 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Apr 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
Semiconductor memory devices, resistive memory devices, memory cell structures, and methods of forming a resistive memory cell are provided. One example method of a resistive memory cell can include a number of dielectric regions formed between two electrodes, and a barrier dielectric region formed between each of the dielectric regions. The barrier dielectric region serves to reduce an oxygen diffusion rate associated with the dielectric regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.