Circuits and methods for providing clock signals
US8847626B1 · kind B1 · utility
4Cited by
2References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Apr 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes first and second bidirectional clock networks and first and second clock signal generation circuits. A first multiplexer circuit is configurable to provide a first clock signal from a first pin to the first bidirectional clock network. A second multiplexer circuit is configurable to provide the first clock signal from the first bidirectional clock network to the second bidirectional clock network. Third multiplexer circuits are configurable to provide the first clock signal from the second bidirectional clock network to the first and the second clock signal generation circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.