Method for segregating the alloying elements and reducing the residue resistivity of copper alloy layers
US8852674B2 · kind B2 · utility
1Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2010 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Apr 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for forming interconnect or interconnections on a substrate for use in a microelectric device are disclosed. In one or more embodiments, the method includes depositing an alloy layer comprising Cu and an alloying element, for, example, Mn, in a dielectric layer and segregating or diffusing the alloying element from the bulk Cu portion of the alloy layer. In one or more embodiments, the method includes annealing the alloy layer in an atomic hydrogen atmosphere. After annealing, the alloy layer exhibits a resistivity that is substantially equivalent to the resistivity of a pure Cu layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.