Patent · US Active

Method of manufacturing semiconductor device

US8853024B2 · kind B2 · utility

2Cited by
0References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 27, 2012
Grant dateOct 7, 2014
Priority date
Expiry dateAug 27, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/85

Abstract

The present invention discloses a method for manufacturing a semiconductor device comprising the steps of: forming a plurality of source and drain regions in a substrate; forming a plurality of gate spacer structures and an interlayer dielectric layer around the gate spacer structures on the substrate, wherein the gate spacer structures enclose a plurality of first gate trenches and a plurality of second gate trenches; sequentially depositing a first gate insulating layer and a second gate insulating layer, a first blocking layer and a second work function regulating layer in the first and second gate trenches; performing selective etching to remove the second work function regulating layer from the first gate trenches to expose the first blocking layer; depositing a first work function regulating layer on the first blocking layer in the first gate trenches and on the second work function regulating layer in the second gate trenches; and depositing a resistance regulating layer on the first work function regulating layer in the first gate trenches and on the first work function regulating layer in the second gate trench.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.