Methods of recessing an active region and STI structures in a common etch process

US8853051B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Frank Jakubowski · Dresden, DE
• Jorg Radecker · Dresden, DE
• Frank Ludwig · Dresden, DE

Key dates

• Filing date: Apr 12, 2012
• Grant date: Oct 7, 2014
• Expiry date: Apr 16, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76283
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Generally, the present disclosure is directed to various methods of recessing an active region and an adjacent isolation structure in a common etch process. One illustrative method disclosed includes forming an isolation structure in a semiconducting substrate, wherein the isolation structure defines an active area in the substrate, forming a patterned masking layer above the substrate, wherein the patterned masking layer exposes the active area and at least a portion of the isolation structure for further processing, and performing a non-selective dry etching process on the exposed active area and the exposed portion of the isolation structure to define a recess in the substrate and to remove at least some of the exposed portions of the isolation structure.