Patent · US Active

Identification circuit and method for generating an identification bit

US8854866B2 · kind B2 · utility

8Cited by

0References

15Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Peter Huber · Neubiberg, DE
Winfried Kamp · Munich, DE
Joel Hatsch · Holzkirchen, DE
Michel d'Argouges · Birkenfeld, DE
Siegmar Koeppe · Laatzen, DE
Thomas Kuenemund · Munich, DE

Key dates

Filing date	Jun 17, 2011
Grant date	Oct 7, 2014
Priority date	—
Expiry date	Mar 31, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG06F21/72
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

A semiconductor device includes an identification circuit. The identification circuit includes a memory cell which includes a first transistor having a first value of a switching characteristic and a second transistor having a second value of the switching characteristic. The identification circuit is operable to generate a memory-cell-specific identification bit which is dependent on production-dictated differences in the first switching characteristic of the first transistor and the second switching characteristic of the second transistor. The identification circuit further includes a drive circuit for the memory cell. The drive circuit is operable to connect or isolate an upper supply potential and a lower supply potential of the semiconductor device to or from the memory cell independently of one another.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.