Patent · US Active

Enhancing adhesion of interlayer dielectric materials of semiconductor devices by suppressing silicide formation at the substrate edge

US8859398B2 · kind B2 · utility

3Cited by
2References
29Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 30, 2010
Grant dateOct 14, 2014
Priority date
Expiry dateNov 24, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/601
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Adhesion of dielectric layer stacks to be formed after completing the basic configuration of transistor elements may be increased by avoiding the formation of a metal silicide in the edge region of the substrate. For this purpose, a dielectric protection layer may be selectively formed in the edge region prior to a corresponding pre-clean process or immediately prior to deposition of the refractory metal. Hence, non-reacted metal may be efficiently removed from the edge region without creating a non-desired metal silicide. Hence, the further processing may be continued on the basis of enhanced process conditions for forming interlayer dielectric materials.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.