Method for processing a wafer at unmasked areas and previously masked areas to reduce a wafer thickness
US8871550B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2012 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Oct 18, 2032 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/0125
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for processing a wafer having microelectromechanical system structures at the first main surface includes applying a masking material at the second main surface and structuring the masking material to obtain a plurality of masked areas and a plurality of unmasked areas at the second main surface. The method further includes anisotropically etching the wafer from the second main surface at the unmasked areas to form a plurality of recesses. The masking material is then removed at least at some of the masked areas to obtain previously masked areas. The method further includes anisotropically etching the wafer from the second main surface at the unmasked areas and the previously masked areas to increase a depth of the recesses and reduce a thickness of the wafer at the previously masked areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.