Dual profile shallow trench isolation apparatus and system
US8872301B2 · kind B2 · utility
2Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2012 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Apr 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/18
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.