Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices
US8877554B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2013 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | May 8, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Packaged semiconductor devices, methods of packaging semiconductor devices, and package-on-package (PoP) devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes forming through-package vias (TPVs) over a carrier, and coupling a semiconductor device to the carrier. The semiconductor device includes contact pads disposed on a surface thereof and an insulating material disposed over the contact pads. A molding material is formed over the carrier between the TPVs and the semiconductor device. Openings are formed in the insulating material using a laser drilling process over the contact pads, and a redistribution layer (RDL) is formed over the insulating material and the openings in the insulating material. A portion of the RDL is coupled to a top surface of each of the contact pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.