Strain-engineered MOSFETs having rimmed source-drain recesses

US8877581B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Amitabh Jain · Allen, US
• Deborah J. Riley · Sachse, US

Key dates

• Filing date: Aug 13, 2010
• Grant date: Nov 4, 2014
• Expiry date: May 8, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

An integrated circuit (IC) includes a plurality of strained metal oxide semiconductor (MOS) devices that include a semiconductor surface having a first doping type, a gate electrode stack over a portion of the semiconductor surface, and source/drain recesses that extend into the semiconductor surface and are framed by semiconductor surface interface regions on opposing sides of the gate stack. A first epitaxial strained alloy layer (rim) is on the semiconductor surface interface regions, and is doped with the first doping type. A second epitaxial strained alloy layer is on the rim and is doped with a second doping type that is opposite to the first doping type that is used to form source/drain regions.