CMOS device for reducing radiation-induced charge collection and method for fabricating the same
US8877594B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2011 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | Jul 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
Abstract
A CMOS device for reducing a radiation-induced charge collection and a method for fabricating the same. In the CMOS device, a heavily doped charge collection-suppressed region is disposed directly under the source region and the drain region. The region has a doping type opposite that of the source region and the drain region, and has a doping concentration not less than that of the source region and the drain region. The charge collection-suppressed region has a lateral part slightly less than or equal to that of the source region and the drain region, and has a lateral range toward to the channel not exceed the edges of the source region and the drain region. The CMOS device may greatly reduce a range of the funnel that appears under the action of a single particle, so that charges collected instantaneously under a force of an electric field may be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.