Processor switchable between test and debug modes
US8887017B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2012 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Jan 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31705
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A processor includes a TCU TAP for access of a TCU for running functional tests and a DAP TAP for access of a debugger. A TAP selection module selects reversibly TAP access by default through the TCU TAP when the processor is a bare die, or by default through the DAP TAP when the processor is packaged, the selection of TAP access being reversible by the TCU. The processor also includes a fuse for irreversibly disabling the selection by the TAP selection module of the TAP access by default through the TCU TAP. Functional tests on bare dies are run with a TCU probing the dies through the TCU TAP by default. Packaged engineering samples can be supplied for debugging with the DAP TAP selected by default, but access possible for the TCU through the TCU TAP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.