Akshay K. Pathak
12Patents
2h-index
18Co-inventors
47Inventor score
Filing activity: May 3, 2006 → May 14, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7478183B2 | Method and system for n dimension arbitration algorithm—scalable to any number of end points | Physics | 10 | Active |
| US9190989B1 | Integrated circuit power management | Emerging Cross-Sectional Technologies | 5 | Active |
| US9476937B2 | Debug circuit for an integrated circuit | Physics | 2 | Active |
| US9494969B2 | Reset circuitry for integrated circuit | Physics | 2 | Active |
| US10848140B1 | Method and system for detecting clock failure | Electricity | 2 | Active |
| US9509305B2 | Power gating techniques with smooth transition | Electricity | 1 | Active |
| US11768963B2 | System and method for validating trust provisioning operation on system-on-chip | Physics | 1 | Active |
| US9395797B2 | Microcontroller with multiple power modes | Emerging Cross-Sectional Technologies | 1 | Active |
| US8887017B2 | Processor switchable between test and debug modes | Physics | 0 | Active |
| US11177015B2 | Built-in self-testing and failure correction circuitry | Electricity | 0 | Active |
| US11556394B2 | System and method for controlling access to shared resource in system-on-chips | Physics | 0 | Active |
| US11307767B1 | System for controlling memory operations in system-on-chips | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.