Methods of forming asymmetric spacers on various structures on integrated circuit products

US8889022B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Hans-Peter Moll · Dresden, DE
• Joachim Patzer · Rohrbach, DE

Key dates

• Filing date: Mar 1, 2013
• Grant date: Nov 18, 2014
• Expiry date: Mar 1, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/32155
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

One illustrative method disclosed herein includes forming a structure above a semiconductor substrate, performing a conformal deposition process to form a layer of undoped spacer material above the structure, performing an angled ion implant process to form a region of doped spacer material in the layer of undoped spacer material while leaving other portions of the layer of undoped spacer material undoped, and, after performing the angled ion implant process, performing at least one etching process that removes the undoped portions of the layer of undoped spacer material and thereby results in a sidewall spacer comprised of the doped spacer material positioned adjacent at least one side, but not all sides, of the structure.