Inventor · Rohrbach, DE

Joachim Patzer

12Patents

3h-index

18Co-inventors

53Inventor score

Filing activity: Jan 12, 2005 → Oct 27, 2014

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7183188B2	Method for fabricating contact-making connections	Electricity	10	Expired
US8889022B2	Methods of forming asymmetric spacers on various structures on integrated circuit products	Electricity	6	Active
US9177874B2	Method of forming a semiconductor device employing an optical planarization layer	Electricity	4	Active
US8765542B1	Methods of forming a semiconductor device while preventing or reducing loss of active area and/or isolation regions	Electricity	3	Active
US9064961B2	Integrated circuits including epitaxially grown strain-inducing fills doped with boron for improved robustness from delimination and methods for fabricating the same	Electricity	3	Active
US8969190B2	Methods of forming a layer of silicon on a layer of silicon/germanium	Electricity	3	Active
US9646838B2	Method of forming a semiconductor structure including silicided and non-silicided circuit elements	Electricity	1	Active
US8906794B1	Gate silicidation	Electricity	1	Active
US9111756B2	Integrated circuits with protected resistors and methods for fabricating the same	Electricity	0	Active
US9034746B2	Gate silicidation	Electricity	0	Active
US9177871B2	Balancing asymmetric spacers	Electricity	0	Active
US9029919B2	Methods of forming silicon/germanium protection layer above source/drain regions of a transistor and a device having such a protection layer	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.