Method and system for thread-based memory speculation in a memory subsystem of a data processing system
US8892821B2 · kind B2 · utility
8Cited by
8References
22Claims
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Key dates
| Filing date | Dec 10, 2003 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system includes a system memory, one or more processing cores, and a memory controller that controls access to a system memory. The memory controller includes a memory speculation mechanism that stores historical information regarding prior memory accesses. In response to a memory access request, the memory controller speculatively initiates access to the system memory based upon the historical information in the memory speculation mechanism in advance of receipt of a coherency message indicating that the memory access request is to be serviced by reference to the system memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.