Systems and methods for lower page writes
US8902652B1 · kind B1 · utility
15Cited by
31References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 2014 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | May 13, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a Multi Level Cell (MLC) memory array block in which lower pages are written first, before any upper pages, the lower page data is subject to an exclusive OR (XOR) operation so that if any lower page becomes uncorrectable by ECC (UECC) then the page can be recovered using XOR. Lower pages in such blocks may be written in nonsequential order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.