Flash memory apparatus with serial interface and reset method thereof
US8914569B2 · kind B2 · utility
0Cited by
5References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2011 |
| Grant date | Dec 16, 2014 |
| Priority date | — |
| Expiry date | Jul 26, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory apparatus with serial interface is disclosed. The flash memory apparatus includes a selector, a core circuit and a programmable data bank. The selector decides whether or not to connect one of a write protect pin and a hold pin to a reset signal line. The core circuit receives a reset signal transmitted by the reset signal line and activates a reset operation accordingly. A selecting data is written into the programmable data bank through a programming method and the programmable data bank outputs the selecting data to serve as a selecting signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.