Insulated gate field effect transistor having passivated schottky barriers to the channel
US8916437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2013 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Feb 1, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/958
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. A passivation layer is included on at least one exposed sidewall surface of the channel, and metal source and drain terminals are located on respective first and second sides of the channel, including on the passivation layer and within the undercut void regions beneath the insulated gate structure. At least one of the metal source and drain terminals comprises a metal that has a work function near a valence band of the p-type substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.