Method for forming semiconductor structure having through silicon via for signal and shielding structure
US8916471B1 · kind B1 · utility
20Cited by
87References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2013 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Aug 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a through silicon via for signal and a shielding structure is provided. A substrate is provided and a region is defined on the substrate. A radio frequency (RF) circuit is formed in the region on the substrate. A through silicon trench (TST) and a through silicon via (TSV) are formed simultaneously, wherein the TST encompasses the region to serve as a shielding structure for the RF circuit. A metal interconnection system is formed on the substrate, wherein the metal interconnection system comprises a connection unit that electrically connects the TSV to the RF circuit to provide a voltage signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.