Semiconductor package with multiple chips and substrate in metal cap
US8916958B2 · kind B2 · utility
2Cited by
6References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2009 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Feb 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a first substrate, a second substrate and a metal cap. The chips are electrically connected to the first substrate, the second substrate is disposed between the chips, and the chips and the second substrate are disposed within the metal cap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.