Multichip power semiconductor device
US8916968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2012 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Mar 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a first chip carrier and a second chip carrier isolated from the first chip carrier. A first power semiconductor chip is mounted on and electrically connected to the first chip carrier. A second power semiconductor chip is mounted on and electrically connected to the second chip carrier. An electrically insulating material is configured to at least partially surround the first power semiconductor chip and the second power semiconductor chip. An electrical interconnect is configured to electrically connect the first power semiconductor chip to the second power semiconductor chip, wherein the electrical interconnect has at least one of a contact clip and a galvanically deposited conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.