Method for forming gate structure, method for forming semiconductor device, and semiconductor device

US8921171B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Hong Yang · Beijing, CN
• Xueli Ma · Shanghai, CN
• Wenwu Wang · Beijing, CN
• Kai Han · Zhubeikou, TW
• Xiaolei Wang · Beijing, CN
• Huaxiang Yin · Beijing, CN
• Jiang Yan · Beijing, CN

Key dates

• Filing date: Jul 24, 2012
• Grant date: Dec 30, 2014
• Expiry date: Feb 4, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

A method for forming a gate structure, comprising: providing a substrate, where the substrate includes a nMOSFET area and a pMOSFET area, each of the nMOSFET area and the pMOSFET area has a gate trench, and each of the gate trenches is provided at a bottom portion with a gate dielectric layer; forming a gate dielectric capping layer on the substrate; forming an etching stop layer on the gate dielectric capping layer; forming an oxygen scavenging element layer on the etching stop layer; forming a first work function adjustment layer on the oxygen scavenging element layer; etching the first work function adjustment layer above the nMOSFET area; forming a second work function adjustment layer on the surface of the substrate; metal layer depositing and annealing to fill the gate trenches with a metal layer; and removing the metal layer outside the gate trenches.