Epitaxially thickened doped or undoped core nanowire FET structure and method for increasing effective device width
US8936972B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2012 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | Dec 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02639
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques for increasing effective device width of a nanowire FET device are provided. In one aspect, a method of fabricating a FET device is provided. The method includes the following steps. A SOI wafer is provided having an SOI layer over a BOX, wherein the SOI layer is present between a buried nitride layer and a nitride cap. The SOI layer, the buried nitride layer and the nitride cap are etched to form nanowire cores and pads in the SOI layer in a ladder-like configuration. The nanowire cores are suspended over the BOX. Epitaxial sidewalls are formed over the sidewalls of the nanowires cores. The buried nitride layer and the nitride cap are removed from the nanowire cores. A gate stack is formed that surrounds at least a portion of each of the nanowire cores and the epitaxial sidewalls.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.