III-V finFETs on silicon substrate

US8937299B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Anirban Basu · Elmsford, US
• Cheng-Wei Cheng · White Plains, US
• Amlan Majumdar · White Plains, US
• Ryan M. Martin · New York, US
• Uzma Rana · Slingerlands, US
• Devendra K. Sadana · Pleasantville, US
• Kuen-Ting Shiu · Yorktown Heights, US
• Yanning Sun · Scarsdale, US

Key dates

• Filing date: Aug 14, 2013
• Grant date: Jan 20, 2015
• Expiry date: Aug 29, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/024

Abstract

A method for forming fin field effect transistors includes forming a dielectric layer on a silicon substrate, forming high aspect ratio trenches in the dielectric layer down to the substrate, the high aspect ratio including a height to width ratio of greater than about 1:1 and epitaxially growing a non-silicon containing semiconductor material in the trenches using an aspect ratio trapping process to form fins. The one or more dielectric layers are etched to expose a portion of the fins. A barrier layer is epitaxially grown on the portion of the fins, and a gate stack is formed over the fins. A spacer is formed around the portion of the fins and the gate stack. Dopants are implanted into the portion of the fins. Source and drain regions are grown over the fins using a non-silicon containing semiconductor material.