Thin stackable package and method
US8937381B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2009 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | Dec 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan out buildup substrate stackable package includes an electronic component having an active surface having bond pads. A package body encloses the electronic component. A first die side buildup dielectric layer is applied to the active surface of the electronic component and to a first surface of the package body. A first die side circuit pattern is formed on the first die side buildup dielectric layer and electrically connected to the bond pads. Through vias extend through the package body and the first die side buildup dielectric layer, the through vias being electrically connected to the first die side circuit pattern. The fan out buildup substrate stackable package is extremely thin and provides a high density interconnect on both sides of the package allowing additional devices to be stacked thereon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.