Methods for fabricating integrated circuits utilizing silicon nitride layers
US8940650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2013 |
| Grant date | Jan 27, 2015 |
| Priority date | — |
| Expiry date | Apr 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0217
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an integrated circuit includes the steps of providing a semiconductor substrate comprising a semiconductor device disposed thereon and depositing a first silicon nitride layer over the semiconductor substrate and over the semiconductor device using a first deposition process. The first deposition process is a plasma-enhanced chemical vapor deposition (PECVD) process that operates over a plurality of cycles, each cycle having a first time interval and a second time interval. The PECVD process includes the steps of generating a plasma with a power source during the first time interval, the plasma comprising reactive ionic and radical species of a silicon-providing gas and a nitrogen-providing gas, and discontinuing generating the plasma during the second time interval immediately subsequent to the first time interval. The method further includes depositing a second silicon nitride layer over the first silicon nitride layer after the plurality of cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.