Differential amplifiers, clock generator circuits, delay lines and methods
US8947141B2 · kind B2 · utility
1Cited by
17References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 19, 2014 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | May 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45396
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifier may be configured to have a duty cycle and/or gain that is adjustable, such as by adjusting the switch points of circuitry in the differential amplifier. The differential amplifier may alternatively or additionally have a hysteresis function by, for example, using a signal feedback from the output of the amplifier to adjust the switch points of circuitry in the differential amplifier. The differential amplifier may be used for a variety of purposes, such as in an input buffer or delay line, either of which may be used, for example, in a clock generator circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.